FabTime Cycle Time Management for Wafer Fabs
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FabTime Bibliography

These are papers that  are available from FabTime, or that include FabTime employees as authors. Papers that can be downloaded have a link after the reference, saying “Download PDF” and the size of the file. Click on the link to open the file in PDF from inside your browser, or right-click and select “Save Target As” to download to your computer. To view the files, you will need the free Acrobat reader, available from www.adobe.com/acrobat. For more information, send email to "papers" at our domain name. If you like these papers, you may be interested in FabTime’s free Cycle Time Management Newsletter (sign up here).

S. Brown, F. Chance, J. W. Fowler, and J. K. Robinson, “A Centralized Approach to Factory Simulation”, Future Fab International, Vol. 3, 83-86, 1997. (Abstract) (Download PDF - 39 KB)
S. Brown, J. Domaschke, and F. Leibl, “Cycle Time Reductions for Test Area Bottleneck Equipment,” Proceedings of the Second Annual SEMI Test, Assembly, and Packaging Automation and Integration Conference, B1-B5, 1998. (Abstract) (Download PDF - 41 KB)
S. Brown, J. Domaschke, and F. Leibl, “No Cost Applications for Assembly Cycle Time Reduction,” Proceedings of the 1999 International Conference on Semiconductor Manufacturing Operational Modeling and Simulation, 1999 Western MultiConference, January 17-20, 1999, San Francisco, CA. Edited by John W. Fowler, Jeffery K. Cochran, and Courtland M. Hilton. (Abstract) (Download PDF - 45 KB)
F. Chance, “Delphi: A C-Based Queuing Network Simulator,” Technical Report 1045, School of Operations Research and Industrial Engineering, Cornell University, 1993. (This paper is not currently available from FabTime.)
F. Chance and J. K. Robinson, “Integrating Cost, Capacity, and Simulation Analysis,” 1997. Published in the Wright Williams & Kelly corporate newsletter. (Abstract) (Download PDF - 45 KB)
F. Chance, J. K. Robinson and J. W. Fowler, “Supporting Manufacturing With Simulation: Model Design, Development, and Deployment,” Proceedings of the 1996 Winter Simulation Conference, San Diego, CA, 1996. (Abstract) (Download PDF - 61 KB)
F. Chance, J. K. Robinson, J. W. Fowler, O. Gihr, B. Rodriguez, and L. W. Schruben, “A Design of Experiments Methodology for Semiconductor Wafer Fab Capacity Planning.” See also SEMATECH Technology Transfer #95062860A-TR, 1995. (Abstract) (Download PDF - 166 KB)
F. Chance, J. K. Robinson, and N. Winter, “Getting To Good Answers: Effective Methods For Validating Complex Models,” Proceedings of the SMOMS Conference, San Jose, CA, 1999. (Abstract) (Download PDF - 45 KB)
J. Domaschke, S. Brown, J. K. Robinson, and F. Leibl, “Effective Implementation Of Cycle Time Reduction Strategies For Semiconductor Back-End Manufacturing,” Proceedings of the 1998 Winter Simulation Conference, Washington, DC, 985-992, 1998. (Abstract) (Download PDF - 65 KB)
J. W. Fowler, S. Brown, H. Gold, and A. Schoemig, “Measurable Improvements in Cycle-Time-Constrained Capacity,” Proceedings of the 6th IEEE/UCS/SEMI International Symposium on Semiconductor Manufacturing (ISSM), October 6-8, 1997, San Francisco, A21-A24. (Abstract) (Download PDF - 163 KB)
J. W. Fowler and J. K. Robinson, “Measurement and Improvement of Manufacturing Capacity (MIMAC) Project Final Report,” SEMATECH Technology Transfer #95062861A-TR, 1995. (Download PDF - 149 KB)
N. S. Grewal, A. C. Bruska, T. M. Wulf, and J. K. Robinson, “Integrating Targeted Cycle-Time Reduction Into The Capital Planning Process,” Proceedings of the 1998 Winter Simulation Conference, Washington, DC, 1005-1010, 1998. (Abstract) (Download PDF - 45 KB)
N. S. Grewal, A. C. Bruska, T. M. Wulf, and J. K. Robinson, “Validating Simulation Model Cycle Times at Seagate Technology.” In Proceedings of the 1999 Winter Simulation Conference, ed. P. A. Farrington, H. B. Nembhard, D. T. Sturrock, and G. W. Evans, 843-849. Institute of Electrical and Electronics Engineers, Piscataway, New Jersey, 1999. (Abstract) (Download PDF - 53 KB)
M. Hillis and J. K. Robinson, “Super-Expediting in a 0.18 Micron Wafer Fab,” Proceedings of the 2002 Modeling and Analysis for Semiconductor Manufacturing Conference (MASM 2002). Tempe, AZ, April 10-12, 2002. (Abstract) (Download PDF - 51 KB)
S. Hood, P. Welch, F. Chance, C. Clemons, and D. Robideau, “Cycle Time Behavior in Semiconductor Manufacturing,” Proceedings of the 1991 Manufacturing Productivity Symposium, IBM, 1991. (This paper is not currently available from FabTime.)
P. A. Jensen and J. K. Robinson, “Deming’s Quality Principles Applied to a Large Lecture Course,” ASEE Journal of Engineering Education, January 1995. (Abstract) (This paper is not currently available from FabTime.)
R. Kotcher and F. Chance,  “Capacity Planning in the Face of Product-Mix Uncertainty,” 1999 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, Santa Clara, CA, 73-76, October 11-13, 1999. (Abstract) (Download PDF - 32 KB)
E. Neacy, N. Abt, S. Brown, M. McDavid, J. Robinson, S. Srodes, and T. Stanley, “Cost Analysis for a Multiple Product / Multiple Process Factory: Application of SEMATECH’s Future Factory Design Methodology,” Proceedings of the Advanced Semiconductor Manufacturing Conference, Boston, MA, 1993. (Abstract) (This paper is not currently available from FabTime.)
A. Peikert, S. Brown, and J. Thoma, “A Rapid Modeling Technique for Measurable Improvements In Factory Performance,” Proceedings of the 1998 Winter Simulation Conference, December 5-8, 1998. (Abstract) (Download PDF - 172 KB)
J. K. Robinson, “Understanding and Improving Wafer Fab Cycle Times.” Semiconductor FabTech, Volume 17, April, 2002. (Abstract) (Download PDF - 106 KB)
J. K. Robinson and F. Chance, “Wafer Fab Cycle Time Management Using MES Data,” Proceedings of the 2000 Modeling and Analysis for Semiconductor Manufacturing Conference (MASM 2000). Tempe, AZ, May 10-12, 2000. (Abstract) (Download PDF - 35 KB)
J. K. Robinson, J. W. Fowler, and J. F. Bard, “The Use of Upstream and Downstream Information in Scheduling Semiconductor Batch Operations,” International Journal of Production Research, Vol. 33, No. 7, 1849-1870, 1995. (Abstract) (This paper is not currently available from FabTime.)
J. K. Robinson, J. W. Fowler, and J. F. Bard, “A Review of Real-Time Control Strategies for Furnace Batch Sizing in Semiconductor Manufacturing.” (Abstract) (Download PDF - 200 KB)
J. K. Robinson, J. W. Fowler, and E. Neacy, “Capacity Loss Factors in Semiconductor Manufacturing.” Working paper. (Abstract) (Download PDF - 96 KB)
J. K. Robinson and R. Giglio, “Capacity Planning for Semiconductor Wafer Fabrication with Time Constraints between Operations.” In Proceedings of the 1999 Winter Simulation Conference, ed. P. A. Farrington, H. B. Nembhard, D. T. Sturrock, and G. W. Evans, 880-887. Institute of Electrical and Electronics Engineers, Piscataway, New Jersey, 1999. (Abstract) (Download PDF - 58 KB)
J. K. Robinson, L. W. Schruben, and J. W. Fowler, “Experimenting with Large-Scale Semiconductor Manufacturing Simulations: A Frequency Domain Approach to Factor Screening,” Proceedings of the Institute of Industrial Engineers Research Conference, Los Angeles, CA, 1993. (Abstract) (This paper is not currently available from FabTime.)

To download the full set of papers all at once, (in a zip file) click here. To unzip this file and see the individual files, you will need a program such as WinZip (a free version of WinZip is available here). If you like these papers, you may be interested in FabTime’s free Cycle Time Management Newsletter (sign up here).

 
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