Search FabTime Website
The FabTime Cycle Time Management newsletter is a forum for introducing and discussing best practices in wafer fab cycle time management.
Single-path tools are a common feature in wafer fabs. They occur whenever a single tool is the only piece of equipment qualified to process a particular operation. During fab startup, the majority of equipment will be single-path (since only one tool of each type has been purchased). As fab volume grows, and duplicate tools are brought on-line, the number of single-path tools is usually reduced. At this point, however, there is often a choice in how the duplicate tools are configured -- cross-qualified in some fashion, or dedicated to individual operations.
In this article, we examine the impact of this tool-dedication decision on the number of single-path tools, and ultimately on cycle time, using concrete numerical examples and simple queueing approximations. Based on our analysis, the sample 100% dedicated-tool configuration results in an average cycle time that is nearly twice as long as the fully cross-qualified configuration. We also include a more intuitive explanation of the advantages of cross-qualification, based on other real-life examples.
While there are certainly other factors affecting the cross-qualification decision, our results suggest that if you do have a legitimate choice between cross-qualification and tool-dedication, you should consider the cycle time benefits of cross-qualification when making your decision.
Discussion topics in this issue include a proposal for cycle time reduction through tool integration and a suggestion about using Production OEE.
If you want to improve throughput for your fab, you need to start with the bottleneck (or bottlenecks), and work from there. However, this is not necessarily true when you’re trying to reduce cycle time. We believe that you can reduce overall cycle time by reducing cycle time at any tool group in the factory.
The notion that you can improve overall cycle times by reducing cycle time at the bottleneck is obvious. And in fact, the bottleneck is a good place to start cycle time improvement efforts, since you probably have a large queue there, and lots of waiting time. The purpose of this article is to point out that you can ALSO reduce cycle time by making changes at non-bottleneck tools. This is far less obvious. With throughput, it doesn’t matter if you process at a higher rate at non-bottleneck tools, because things get held up at the bottleneck anyway. Sometimes this happens with cycle time, too. But not always. We divide our discussion into three cases: tools located after the bottleneck in the process flow, tools located before the bottleneck, and tools located between visits to the bottleneck. We also include a series of concrete, low-cost suggestions for improving cycle time at non-bottleneck tools.
Our overall point is very simple: actions that you take to improve cycle time at non-bottleneck tools often improve overall product cycle times. For operations located before the first visit to the bottleneck, or after the last visit to the bottleneck, the cycle time reduction leads to an essentially direct reduction in the overall cycle time. For intermediate operations the situation is less clear, but we believe that improvements here can sometimes improve cycle time dramatically, and in the worst case, will not make cycle time any worse. If you focus your efforts strictly on bottleneck tools, then, you miss out on many opportunities for improvement.
Discussion topics in this issue include: a question about tool performance vs. rate of return.
Wafer fabs cost a lot of money. Fab managers, therefore, are constantly under pressure to run them well, so that the huge investment in capital equipment is not wasted. But what does it mean to run a wafer fab “well”? In an ideal world, we would be able to keep all of that expensive equipment highly utilized, with the utilization dedicated completely to productive work. At the same time, we would have low and predictable cycle times, and a minimal amount of capital tied up in WIP. We would keep our operators busy and effective all of the time, so that we weren’t wasting salary on having people stand around the fab. We would constantly improve our products, yet always maintain 100% line yield. We would keep costs down, but be able to charge high prices by having speedy time to market.
Of course this combination of circumstances is impossible for many reasons. A wafer fab, as we discussed in the early issues of this newsletter, is a highly variable environment. In the presence of variability, high utilizations lead inevitably to high cycle time and WIP. You can load your operators and your tools heavily, or you can have low cycle time and WIP. You can’t do both, unless you stamp out variability.
So the question is, what performance metrics should a fab manager use to make sure things are on track? And after deciding which to use, what are the correct definitions to use for these metric? We have observed, during our years of consulting, that different people often define the same metric differently. This is a source of confusion when comparing performance between or within companies. When people talk about utilization, for example, there are several things that they might mean. Similarly for turns. We therefore are proposing some definitions to apply within our niche of cycle time management. The terms defined in this article include starts, utilization, OEE, turns, throughput, line yield, cycle time, cycle time/raw process time, and cycle time per layer. We discuss each of these in detail.
This article is concerned with an apparent conflict between an implication of the Theory of Constraints (TOC) as applied to wafer fabs and the application of just-in-time manufacturing (JIT). One implication of TOC is that utilization of manufacturing resources should be intentionally unbalanced. The result is an identifiable bottleneck that is managed to optimize the throughput-accounting performance measures (throughput dollars, operating expense, and inventory dollars).
Just-in-time manufacturing refers to the mindset spearheaded by Taiichi Ohno at Toyota Motor Company. In an effort that dates to the 1940’s, the company developed and implemented a number of improvement techniques aimed at two basic goals:
JIT manufacturing techniques include setup reduction, total quality management, and kanbans. Kanbans in particular have developed a strong association with just-in-time manufacturing, which can cause considerable confusion, since kanbans require a more balanced line.
FabTime asks: Do the manufacturing recommendations of the theory of constraints (an unbalanced line being one of these) conflict with just-in-time manufacturing? We then reconcile Jonah’s quote with Toyota’s success by recognizing that both the theory of constraints and just-in-time manufacturing use WIP-limiting techniques - the difference lies in the extent to which these techniques are applied throughout the factory.
We conclude that if you are going to adopt a just-in-time manufacturing mindset, or a goal manufacturing mindset, you should set aside sufficient time to apply the entire process. Saving time by skipping to the answers (e.g. using existing implementation techniques such as kanbans or drum-buffer-rope) will likely result in little long-term gain.
The Theory of Constraints is now in its fourth decade of development. In order to install any scheduling system into a complex job-shop environment (like a wafer fab), Eli Goldratt discovered that it may be necessary to first solve much deeper basic problems. It is this insight that led Goldratt to the concepts found in “The Goal”, first published in 1984. Most people are introduced to the theory of constraints via “The Goal”, often at the urging of a friend or colleague who has previously read it. The book is a fast-moving novel that considers the plight of Alex Rogo, a plant manager whose factory is in deep trouble.
The book outlines Alex’s development (through the help of his mentor, Jonah) of a series of performance measures that, if improved, will result in the factory meeting its goal. To improve these performance measures requires a sequential process of identifying the bottleneck, improving the bottleneck’s performance, and then identifying the next bottleneck. Eventually, Alex’s team learns that not all bottlenecks are physical tools in the factory, and that policy constraints can cause bottlenecks too. The book concludes with a systematic method for identifying and attacking system constraints (this is the theory of constraints, or TOC). FabTime’s write-up on the subject concludes with some implications of TOC for wafer fabs.
Little’s Law: The relationship between cycle time, WIP, and throughput
The relationship between cycle time and WIP was first documented in 1961 by J. D. C. Little. Little’s Law states that at a given throughput level, the ratio of WIP to cycle time equals throughput, as shown in the formulas below:
Throughput = WIP / Cycle Time Cycle Time = WIP / Throughput
In other words, for a factory with constant throughput, WIP and cycle time are proportional. Keep in mind that Little’s Law doesn’t say that WIP and cycle time are independent of start rate. Little’s Law just says if you have two of these three numbers, you should be able to solve for the remaining one. The tricky part is that cycle time and WIP are really functions of the start rate. So changing the start rate in fact changes all three parameters, but Little’s Law should hold for the new numbers.
Discussion topics in this issue include: reducing variability in observed process times.
The Pollaczek-Khintchine (called P-K, for obvious reasons) formula gives the expected average WIP at a single-tool workstation where arrivals to the workstation are highly variable, and process times are somewhat less variable. More specifically, the formula applies when interarrival times to the workstation are exponentially distributed, and process times follow a general distribution (what is known as an M/G/1 queue). For tools that fit this description, the expected WIP can be easily computed from the mean interarrival time, the mean process time, and the variance of the process time distribution.
The P-K formula tells us that, if we look at individual tools in the fab, anything that we can do to reduce variability in the process times seen by successive lots will directly act to reduce WIP at these tools, without requiring a reduction in tool loading. And, as will be discussed in the next issue of the newsletter, cycle time will go down at the same time. The P-K formula is the mathematical justification for variability reduction efforts in a wafer fab.
Discussion topics in this issue include: contributors to wafer fab variability.
The Hawthorne Effect is named after a series of studies conducted at the Western Electric Hawthorne plant in the early 20th century. The initial aim of the studies was to understand the impact of lighting levels on worker productivity. As expected, the first studies found that as lighting levels increased, so did productivity. However, researchers did a parallel experiment in which lighting levels were decreased, and found that productivity went up as the light decreased, even when lighting was very low. After conducting a number of other related studies, the researchers concluded that productivity increases as a result of attention received by the workers. This phenomenon is believed to be due at least in part to the fact that work is a group activity, and employees strive for a sense of belonging (Hopp and Spearman, Factory Physics, 1996).
This month’s subscriber discussion forum focuses on knowledge-sharing regarding lot release, dispatch, and scheduling techniques for cycle-time management.
Copyright ©1999-2017 FabTime Inc.